![]() For the image sensor, vsync is ''frame sync'' and is high when the sensor is transmitting an image. Take a look at this, copied from my code: It might be that you're grabbing data from the DCMI port when the image sensor is not sending data, because the active / inactive polarity is set backwards. One of the things I found super-uber-confusing in the DCMI documentation is their definitions of the control signal polarities. We don't have any LVDS in the middle though - the sensor is hooked up directly. Please if you have any experience using DCMI and are willing to share I am willing to read!īrad, we're using the DCMI port on a 207 to receive data from an Aptina sensor. ![]() I will at keep everyone posted on my progress. Regarding my issue, I know I really didn't address with a question as I am a bit confused still with working with this DCMI. When SECS is set, DRDY and CECS are reset. When DRDY is set so is CECS, and SECS is reset. The DRDY, CECS, and SECS flags are the onse being set. Has anyone else noticed these differences or know what the CECS,SECS, CEIS, SEIS may stand for? Where in the reference manual it is showing: I do notice some discrepencies between the memory map file and the reference manual from what I am actually seeing in the DCMI_SR. ![]() I know that it is seeing something from the camera though as it is not getting anythign in the data register when i disconnect the camera. I know this is not all the data that the camera is putting out as it I have it setup in test mode putting out a grayscale image. The DMA is transferring 0x04040404 into memory as that is all that is put in the data register. ![]() I have DMA setup to transfer a picture into SRAM and this is happening, except for the fact that all my image data is exactly the same. Let me get started out with what I am seeing. Now that the quick introduction is out of the way. I have 1 byte of data the Pixel clock and H and V Syncs all wired into the STM3220g eval board, which has the F207IG on board. The image sensor only put out intersperesed 8 bit serial LVDS so I have it going through a de-serializer and all the signals look perfectly fine as expected. I am incorporating a Micron VGA CMOS Digital Image Sensor that I have previously had working on an 8051 through an Altera FPGA chip. I am now moving into the toughest part of my project. I have had a couple porblems resolved by sharing with the community here.
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